From: "Maciej W. Rozycki" Here is a patch to do some cleanup to code affected by the recent change to the bootstrap code responsible for enabling the local APIC. It adds a message about how to get the APIC enabled if previously disabled by the BIOS to aid people expecting the former behavior. It removes some P4-specific code that's become dead as a result of the change. Finally it improves a couple of inaccurate comments. This has been agreed to be reasonable. Signed-off-by: "Maciej W. Rozycki" Signed-off-by: Andrew Morton --- 25-akpm/arch/i386/kernel/apic.c | 20 ++++++++++++-------- 1 files changed, 12 insertions(+), 8 deletions(-) diff -puN arch/i386/kernel/apic.c~up-local-apic-bootstrap-cleanup arch/i386/kernel/apic.c --- 25/arch/i386/kernel/apic.c~up-local-apic-bootstrap-cleanup Mon Nov 1 16:45:33 2004 +++ 25-akpm/arch/i386/kernel/apic.c Mon Nov 1 16:45:33 2004 @@ -689,7 +689,7 @@ static int __init detect_init_APIC (void u32 h, l, features; extern void get_cpu_vendor(struct cpuinfo_x86*); - /* Disabled by DMI scan or kernel option? */ + /* Disabled by kernel option? */ if (enable_local_apic < 0) return -1; @@ -703,8 +703,7 @@ static int __init detect_init_APIC (void break; goto no_apic; case X86_VENDOR_INTEL: - if (boot_cpu_data.x86 == 6 || - (boot_cpu_data.x86 == 15 && (cpu_has_apic || enable_local_apic > 0)) || + if (boot_cpu_data.x86 == 6 || boot_cpu_data.x86 == 15 || (boot_cpu_data.x86 == 5 && cpu_has_apic)) break; goto no_apic; @@ -714,15 +713,20 @@ static int __init detect_init_APIC (void if (!cpu_has_apic) { /* - * Over-ride BIOS and try to enable LAPIC - * only if "lapic" specified + * Over-ride BIOS and try to enable the local + * APIC only if "lapic" specified. */ - if (enable_local_apic != 1) - goto no_apic; + if (enable_local_apic <= 0) { + apic_printk(APIC_VERBOSE, + "Local APIC disabled by BIOS -- " + "you can enable it with \"lapic\"\n"); + return -1; + } /* * Some BIOSes disable the local APIC in the * APIC_BASE MSR. This can only be done in - * software for Intel P6 and AMD K7 (Model > 1). + * software for Intel P6 or later and AMD K7 + * (Model > 1) or later. */ rdmsr(MSR_IA32_APICBASE, l, h); if (!(l & MSR_IA32_APICBASE_ENABLE)) { _