84(%amarula,vyasa-rk3288rockchip,rk3288&7Amarula Vyasa-RK3288aliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12'@5< Hcpu@501cpuarm,cortex-a12P'@5Hcpu@502cpuarm,cortex-a12P'@5Hcpu@503cpuarm,cortex-a12P'@5Hcpu-opp-tableoperating-points-v2aHopp-126000000ls opp-216000000l s opp-312000000ls opp-408000000lQs opp-600000000l#Fs opp-696000000l)|s~opp-816000000l0,sB@opp-1008000000l<sopp-1200000000lGsopp-1416000000lTfrsOopp-1512000000lZJs opp-1608000000l_"spamba simple-busdma-controller@ff250000arm,pl330arm,primecell%@5 apb_pclkHdma-controller@ff600000arm,pl330arm,primecell`@5 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@5 apb_pclkHYreserved-memorydma-unusable@fe000000oscillator fixed-clockn6xin24mH timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 5 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 5Drvbiuciuciu-driveciu-sample)  @4resetokay@J\mdefault dwmmc@ff0d0000rockchip,rk3288-dw-mshcр 5Eswbiuciuciu-driveciu-sample) ! @4reset disableddwmmc@ff0e0000rockchip,rk3288-dw-mshcр 5Ftxbiuciuciu-driveciu-sample) "@4reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 5Guybiuciuciu-driveciu-sample) #@4resetokay@Jdefaultsaradc@ff100000rockchip,saradc $5I[saradcapb_pclkW 4saradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi5ARspiclkapb_pclk  txrx ,default disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi5BSspiclkapb_pclk txrx -default  disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi5CTspiclkapb_pclktxrx .default!"#$ disabledi2c@ff140000rockchip,rk3288-i2c >i2c5Mdefault% disabledi2c@ff150000rockchip,rk3288-i2c ?i2c5Odefault& disabledi2c@ff160000rockchip,rk3288-i2c @i2c5Pdefault' disabledi2c@ff170000rockchip,rk3288-i2c Ai2c5Qdefault( disabledserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 75MUbaudclkapb_pclkdefault) disabledserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 85NVbaudclkapb_pclkdefault* disabledserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 95OWbaudclkapb_pclkdefault+okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :5PXbaudclkapb_pclkdefault, disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;5QYbaudclkapb_pclkdefault- disabledthermal-zonesreserve_thermal%.cpu_thermald%.tripscpu_alert05pApassiveH/cpu_alert15$ApassiveH0cpu_crit5_A criticalcooling-mapsmap0L/ Qmap1L0 Qgpu_thermald%.tripsgpu_alert05pApassiveH1gpu_crit5_A criticalcooling-mapsmap0L1 Qtsadc@ff280000rockchip,rk3288-tsadc( %5HZtsadcapb_pclk 4tsadc-apbinitdefaultsleep2`3j2tsokayH.ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq485fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB 4stmmacethokay5inputdefault6789$:/rgmii8 N'B@ c;s0|usb@ff500000 generic-ehciP 5usbhost<usbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 5otghost= usb2-phyokaydefault>usb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 5otgotg@@ ? usb2-phyokayusb@ff5c0000 generic-ehci\ 5usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c5Ldefault@okaypmic@1brockchip,rk808&Axin32krk808-clkout2defaultBCDDDD+D7DCOD[DhDuregulatorsDCDC_REG1vdd_arm qpH regulator-state-memDCDC_REG2vdd_gpu PHsregulator-state-memB@DCDC_REG3vcc_ddrregulator-state-memDCDC_REG4vcc_io2Z2ZHregulator-state-mem2ZLDO_REG1vcc_tp2Z2Zregulator-state-mem2ZLDO_REG2 vcc_codec2Z2Zregulator-state-memLDO_REG3vdd_10B@B@regulator-state-memB@LDO_REG4vcc_gpsw@w@regulator-state-memw@LDO_REG5 vccio_sdw@2ZHregulator-state-mem2ZLDO_REG6 vcc10_lcdB@B@regulator-state-memw@LDO_REG7vcc_18w@w@HXregulator-state-memw@LDO_REG8 vcc18_lcdw@w@regulator-state-memw@SWITCH_REG1vcc_sd2Z2ZHregulator-state-memSWITCH_REG2vcc_lan2Z2ZH:regulator-state-memi2c@ff660000rockchip,rk3288-i2cf =i2c5NdefaultEokayHopwm@ff680000rockchip,rk3288-pwmh4defaultF5^pwm disabledpwm@ff680010rockchip,rk3288-pwmh4defaultG5^pwm disabledpwm@ff680020rockchip,rk3288-pwmh 4defaultH5^pwm disabledpwm@ff680030rockchip,rk3288-pwmh04defaultI5^pwm disabledbus_intmem@ff700000 mmio-sramppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsHpower-controller!rockchip,rk3288-power-controller?h H\pd_vio@9 5chgfdehilkj$SJKLMNOPQRpd_hevc@11 5opSSTpd_video@12 5SUpd_gpu@13 5SVWreboot-modesyscon-reboot-modeZaRBmRB{RB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv4Hjk$#gׄeрxhрxhHsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwH4edp-phyrockchip,rk3288-dp-phy5h24m disabledHlio-domains"rockchip,rk3288-io-voltage-domainokayXX:%3Xusbphyrockchip,rk3288-usb-phyokayusb-phy@320 5]phyclkH?usb-phy@33445^phyclkH<usb-phy@348H5_phyclkH=watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt5p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif? hclkmclk5TYtx 6defaultZ4 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s? 5YYtxrxi2s_hclki2s_clk5Rdefault[Pk disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 5}aclkhclksclkapb_pclk 4crypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu5 aclkiface disablediommu@ff914000rockchip,iommu @P isp_mmu5 aclkiface disabledrga@ff920000rockchip,rk3288-rga 5jaclkhclksclk\ ilm 4coreaxiahbvop@ff930000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vop\ def 4axiahbdclk]okayportH endpoint@0^Hpendpoint@1_Hmendpoint@2`Hgendpoint@3aHjiommu@ff930300rockchip,iommu  vopb_mmu5 aclkiface\ okayH]vop@ff940000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vop\  4axiahbdclkbokayportH endpoint@0cHqendpoint@1dHnendpoint@2eHhendpoint@3fHkiommu@ff940300rockchip,iommu  vopl_mmu5 aclkiface\ okayHbmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 5~d refpclk\ 4 disabledportsportendpoint@0gH`endpoint@1hHelvds@ff96c000rockchip,rk3288-lvds@5g pclk_lvdslcdci\ 4 disabledportsport@0endpoint@0jHaendpoint@1kHfdp@ff970000rockchip,rk3288-dp@ b5icdppclkldpo4dp4 disabledportsport@0endpoint@0mH_endpoint@1nHdhdmi@ff980000rockchip,rk3288-dw-hdmi?4 g5hmniahbisfrcec\ okayoportsportendpoint@0pH^endpoint@1qHciommu@ff9a0800rockchip,iommu vpu_mmu5 aclkiface disablediommu@ff9c0440rockchip,iommu @@@ o hevc_mmu5 aclkiface disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu5r\ okaysgpu-opp-tableoperating-points-v2Hropp@100000000ls~opp@200000000l s~opp@300000000lsB@opp@400000000lׄsopp@500000000lesOopp@600000000l#Fsqos@ffaa0000syscon HVqos@ffaa0080syscon HWqos@ffad0000syscon HKqos@ffad0100syscon HLqos@ffad0180syscon HMqos@ffad0400syscon HNqos@ffad0480syscon HOqos@ffad0500syscon HJqos@ffad0800syscon HPqos@ffad0880syscon HQqos@ffad0900syscon HRqos@ffae0000syscon HUqos@ffaf0000syscon HSqos@ffaf0080syscon HTinterrupt-controller@ffc01000 arm,gic-400@ @ `   Hefuse@ffb40000rockchip,rk3288-efuse 5q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl4gpio0@ff750000rockchip,gpio-banku Q5@ HAgpio1@ff780000rockchip,gpio-bankx R5A gpio2@ff790000rockchip,gpio-banky S5B gpio3@ff7a0000rockchip,gpio-bankz T5C gpio4@ff7b0000rockchip,gpio-bank{ U5D H;gpio5@ff7c0000rockchip,gpio-bank| V5E gpio6@ff7d0000rockchip,gpio-bank} W5F gpio7@ff7e0000rockchip,gpio-bank~ X5G gpio8@ff7f0000rockchip,gpio-bank Y5H H|hdmihdmi-cec-c0,thdmi-cec-c7,thdmi-ddc ,ttpcfg-pull-up:Hupcfg-pull-downGHvpcfg-pull-noneVHtpcfg-pull-none-12maVc Hwsleepglobal-pwroff,tHCddrio-pwroff,tddr0-retention,uddr1-retention,uedpedp-hpd, vi2c0i2c0-xfer ,ttH@i2c1i2c1-xfer ,ttH%i2c2i2c2-xfer , t tHEi2c3i2c3-xfer ,ttH&i2c4i2c4-xfer ,ttH'i2c5i2c5-xfer ,ttH(i2s0i2s0-bus`,ttttttH[lcdclcdc-ctl@,ttttHisdmmcsdmmc-clk,tH sdmmc-cmd,uHsdmmc-cd,uHsdmmc-bus1,usdmmc-bus4@,uuuuHsdio0sdio0-bus1,usdio0-bus4@,uuuusdio0-cmd,usdio0-clk,tsdio0-cd,usdio0-wp,usdio0-pwr,usdio0-bkpwr,usdio0-int,usdio1sdio1-bus1,usdio1-bus4@,uuuusdio1-cd,usdio1-wp,usdio1-bkpwr,usdio1-int,usdio1-cmd,usdio1-clk,tsdio1-pwr, uemmcemmc-clk,tHemmc-cmd,uHemmc-pwr, uHemmc-bus1,uemmc-bus4@,uuuuemmc-bus8,uuuuuuuuHspi0spi0-clk, uHspi0-cs0, uHspi0-tx,uHspi0-rx,uHspi0-cs1,uspi1spi1-clk, uHspi1-cs0, uH spi1-rx,uHspi1-tx,uHspi2spi2-cs1,uspi2-clk,uH!spi2-cs0,uH$spi2-rx,uH#spi2-tx, uH"uart0uart0-xfer ,utH)uart0-cts,uuart0-rts,tuart1uart1-xfer ,u tH*uart1-cts, uuart1-rts, tuart2uart2-xfer ,utH+uart3uart3-xfer ,utH,uart3-cts, uuart3-rts, tuart4uart4-xfer ,utH-uart4-cts, uuart4-rts, ttsadcotp-gpio, tH2otp-out, tH3pwm0pwm0-pin,tHFpwm1pwm1-pin,tHGpwm2pwm2-pin,tHHpwm3pwm3-pin,tHIgmacrgmii-pins,ttttwwwwttt wwttH6rmii-pins,ttttttttttphy-int, uH9phy-pmeb,uH8phy-rst,xH7spdifspdif-tx, tHZpcfg-output-highrHxpmicpmic-int,uHBusb_hostphy-pwr-en, xH>usb2-pwr-en, tH}usb_otgotg-vbus-drv, tHzchosen~/serial@ff690000memorymemorydc12-vbatregulator-fixed dc12_vbatHyvboot-3v3regulator-fixed vboot_3v32Z2Zyvsys-regulatorregulator-fixedvcc_sys8u 8u yHDvboot-5vregulator-fixed vboot_svLK@LK@yv3g-3v3regulator-fixedv3g_3v32Z2Zyvsus-5vregulator-fixedvsus_5vLK@LK@H{vusb1-5vregulator-fixed vusb1_5v nA defaultzLK@LK@{vusb2-5vregulator-fixed vusb2_5v n| default}LK@LK@{external-gmac-clock fixed-clocksY@ ext_gmacH5 #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclockscpu0-supplyphandleoperating-pointsopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsdmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplybb-supplydvp-supplyflash0-suuplyflash1-supplygpio30-supplygpio1830lcdc-supplysdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathvin-supplyenable-active-high