8<( @phytec,rk3288-pcm-947phytec,rk3288-phycore-somrockchip,rk3288&7Phytec RK3288 PCM-947aliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/i2c@ff140000/rtc@68/i2c@ff650000/pmic@1carm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12"1@?Fcpu@501cpuarm,cortex-a12N"1@?Fcpu@502cpuarm,cortex-a12N"1@?Fcpu@503cpuarm,cortex-a12N"1@?Fcpu-opp-tableoperating-points-v2_Fopp-126000000jq opp-216000000j q opp-312000000jq opp-408000000jQq opp-600000000j#Fq opp-696000000j)|q~opp-816000000j0,qB@opp-1008000000j<qopp-1200000000jGqopp-1416000000jTfrqOopp-1512000000jZJq opp-1608000000j_"qpamba simple-busdma-controller@ff250000arm,pl330arm,primecell%@? apb_pclkFdma-controller@ff600000arm,pl330arm,primecell`@? apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@? apb_pclkF]reserved-memorydma-unusable@fe000000oscillator fixed-clockn6xin24mF timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H ? a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр ?Drvbiuciuciu-driveciu-sample'  @2resetokay>HZk}default dwmmc@ff0d0000rockchip,rk3288-dw-mshcр ?Eswbiuciuciu-driveciu-sample' ! @2reset disableddwmmc@ff0e0000rockchip,rk3288-dw-mshcр ?Ftxbiuciuciu-driveciu-sample' "@2reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр ?Guybiuciuciu-driveciu-sample' #@2resetokay>H}defaultsaradc@ff100000rockchip,saradc $?I[saradcapb_pclkW 2saradc-apbokayspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi?ARspiclkapb_pclk  txrx ,default disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi?BSspiclkapb_pclk txrx -default ! disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi?CTspiclkapb_pclktxrx .default"#$%okayflash@0 micron,n25q128a13jedec,spi-nor);okayi2c@ff140000rockchip,rk3288-i2c >i2c?Mdefault&okaytouchscreen@44 st,stmpe811Dadc@64maxim,max1037drtc@68rv4162hdefault'&( i2c@ff150000rockchip,rk3288-i2c ?i2c?Odefault)okayeeprom@51 atmel,24c32QJ i2c@ff160000rockchip,rk3288-i2c @i2c?Pdefault*okayleddimmer@62 nxp,pca9533bled1 Sred:user1Ynoneled2 Sgreen:user2Ynoneled3 Sblue:user3Ynoneled4 Sred:user4Ynonei2c@ff170000rockchip,rk3288-i2c Ai2c?Qdefault+okayFsserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7oy?MUbaudclkapb_pclkdefault ,-.okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8oy?NVbaudclkapb_pclkdefault/ disabledserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9oy?OWbaudclkapb_pclkdefault0okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :oy?PXbaudclkapb_pclkdefault1 disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;oy?QYbaudclkapb_pclkdefault2 disabledthermal-zonesreserve_thermal3cpu_thermald3tripscpu_alert0ppassiveF4cpu_alert1$passiveF5cpu_crit_ criticalcooling-mapsmap04 map15 gpu_thermald3tripsgpu_alert0ppassiveF6gpu_crit_ criticalcooling-mapsmap06 tsadc@ff280000rockchip,rk3288-tsadc( %?HZtsadcapb_pclk 2tsadc-apbinitdefaultsleep787sokay&=F3ethernet@ff290000rockchip,rk3288-gmac)Xmacirqeth_wake_irqh98?fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB 2stmmacethokayu:inputdefault ;<=>? rgmii-id 'B@ @ mdio0snps,dwmac-mdioethernet-phy@0ethernet-phy-ieee802.3-c22&@*?McF>usb@ff500000 generic-ehciP ?usbhostuAzusbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T ?otghostuB zusb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X ?otgotg@@ uC zusb2-phyokayusb@ff5c0000 generic-ehci\ ?usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c?LdefaultDokaypmic@1crockchip,rk818&EdefaultFGGGGH(G4I@ILXregulatorsDCDC_REG1evdd_logtregulator-state-memDCDC_REG2evdd_gput 5regulator-state-memB@DCDC_REG3evcc_ddrtregulator-state-memDCDC_REG4 evdd_3v3_iot2Z2ZFregulator-state-mem2ZDCDC_BOOSTevdd_systLK@LK@FGregulator-state-memLK@SWITCH_REGevdd_sdtFregulator-state-memLDO_REG2 evdd_eth_2v5t&%&%F?regulator-state-mem&%LDO_REG3evdd_1v0tB@B@regulator-state-memB@LDO_REG4evdd_1v8_lcd_ldotw@w@regulator-state-memw@LDO_REG6 evdd_1v0_lcdtB@B@regulator-state-memB@LDO_REG7 evdd_1v8_ldotw@w@Fregulator-state-memw@LDO_REG9 evdd_io_sdtw@2ZFregulator-state-memeeprom@50 atmel,24c32PJ regulator@60 fcs,fan53555`t4,evdd_cpu 5P@eGi2c@ff660000rockchip,rk3288-i2cf =i2c?NdefaultJ disabledpwm@ff680000rockchip,rk3288-pwmhpdefaultK?^pwm disabledpwm@ff680010rockchip,rk3288-pwmhpdefaultL?^pwmokaypwm@ff680020rockchip,rk3288-pwmh pdefaultM?^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0pdefaultN?^pwm disabledbus_intmem@ff700000 mmio-sramppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsFpower-controller!rockchip,rk3288-power-controller{uh F`pd_vio@9 ?chgfdehilkj$OPQRSTUVWpd_hevc@11 ?opXYpd_video@12 ?Zpd_gpu@13 ?[\reboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruvh9Hujk$#gׄeрxhрxhFsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwF9edp-phyrockchip,rk3288-dp-phy?h24m disabledFpio-domains"rockchip,rk3288-io-voltage-domainokayI*:HR]iuusbphyrockchip,rk3288-usb-phyokayusb-phy@320 ?]phyclkFCusb-phy@3344?^phyclkFAusb-phy@348H?_phyclkFBwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt?p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk?T]tx 6default^h9 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5]]txrxi2s_hclki2s_clk?Rdefault_ disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 ?}aclkhclksclkapb_pclk 2crypto-rstokayiommu@ff900800rockchip,iommu@ Xiep_mmu? aclkiface disablediommu@ff914000rockchip,iommu @P Xisp_mmu? aclkiface disabledrga@ff920000rockchip,rk3288-rga ?jaclkhclksclk` ilm 2coreaxiahbvop@ff930000rockchip,rk3288-vop ?aclk_vopdclk_vophclk_vop` def 2axiahbdclkaokayportF endpoint@0 bFtendpoint@1 cFqendpoint@2 dFkendpoint@3 eFniommu@ff930300rockchip,iommu  Xvopb_mmu? aclkiface` okayFavop@ff940000rockchip,rk3288-vop ?aclk_vopdclk_vophclk_vop`  2axiahbdclkfokayportF endpoint@0 gFuendpoint@1 hFrendpoint@2 iFlendpoint@3 jFoiommu@ff940300rockchip,iommu  Xvopl_mmu? aclkiface` okayFfmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ ?~d refpclk` h9 disabledportsportendpoint@0 kFdendpoint@1 lFilvds@ff96c000rockchip,rk3288-lvds@?g pclk_lvdslcdcm` h9 disabledportsport@0endpoint@0 nFeendpoint@1 oFjdp@ff970000rockchip,rk3288-dp@ b?icdppclkupzdpo2dph9 disabledportsport@0endpoint@0 qFcendpoint@1 rFhhdmi@ff980000rockchip,rk3288-dw-hdmiyh9 g?hmniahbisfrcec` okay sportsportendpoint@0 tFbendpoint@1 uFgiommu@ff9a0800rockchip,iommu Xvpu_mmu? aclkiface disablediommu@ff9c0440rockchip,iommu @@@ o Xhevc_mmu? aclkiface disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ Xjobmmugpu?v`  disabledgpu-opp-tableoperating-points-v2Fvopp@100000000jq~opp@200000000j q~opp@300000000jqB@opp@400000000jׄqopp@500000000jeqOopp@600000000j#Fqqos@ffaa0000syscon F[qos@ffaa0080syscon F\qos@ffad0000syscon FPqos@ffad0100syscon FQqos@ffad0180syscon FRqos@ffad0400syscon FSqos@ffad0480syscon FTqos@ffad0500syscon FOqos@ffad0800syscon FUqos@ffad0880syscon FVqos@ffad0900syscon FWqos@ffae0000syscon FZqos@ffaf0000syscon FXqos@ffaf0080syscon FYinterrupt-controller@ffc01000 arm,gic-400 ! 6@ @ `   Fefuse@ffb40000rockchip,rk3288-efuse ?q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrlh9gpio0@ff750000rockchip,gpio-banku Q?@ G W ! 6FEgpio1@ff780000rockchip,gpio-bankx R?A G W ! 6gpio2@ff790000rockchip,gpio-banky S?B G W ! 6Fgpio3@ff7a0000rockchip,gpio-bankz T?C G W ! 6gpio4@ff7b0000rockchip,gpio-bank{ U?D G W ! 6F@gpio5@ff7c0000rockchip,gpio-bank| V?E G W ! 6F(gpio6@ff7d0000rockchip,gpio-bank} W?F G W ! 6gpio7@ff7e0000rockchip,gpio-bank~ X?G G W ! 6F~gpio8@ff7f0000rockchip,gpio-bank Y?H G W ! 6Fhdmihdmi-cec-c0 cwhdmi-cec-c7 cwhdmi-ddc cwwpcfg-pull-up qFxpcfg-pull-down ~Fypcfg-pull-none Fwpcfg-pull-none-12ma  Fzsleepglobal-pwroff cwddrio-pwroff cwddr0-retention cxddr1-retention cxedpedp-hpd c yi2c0i2c0-xfer cwwFDi2c1i2c1-xfer cwwF&i2c2i2c2-xfer c w wFJi2c3i2c3-xfer cwwF)i2c4i2c4-xfer cwwF*i2c5i2c5-xfer cwwF+i2s0i2s0-bus` cwwwwwwF_lcdclcdc-ctl@ cwwwwFmsdmmcsdmmc-clk czF sdmmc-cmd c{F sdmmc-cd cxFsdmmc-bus1 cxsdmmc-bus4@ c{{{{Fsdmmc-pwr c wsdio0sdio0-bus1 cxsdio0-bus4@ cxxxxsdio0-cmd cxsdio0-clk cwsdio0-cd cxsdio0-wp cxsdio0-pwr cxsdio0-bkpwr cxsdio0-int cxsdio1sdio1-bus1 cxsdio1-bus4@ cxxxxsdio1-cd cxsdio1-wp cxsdio1-bkpwr cxsdio1-int cxsdio1-cmd cxsdio1-clk cwsdio1-pwr c xemmcemmc-clk czFemmc-cmd czFemmc-pwr c xFemmc-bus1 cxemmc-bus4@ cxxxxemmc-bus8 czzzzzzzzFspi0spi0-clk c xFspi0-cs0 c xFspi0-tx cxFspi0-rx cxFspi0-cs1 cxspi1spi1-clk c xFspi1-cs0 c xF!spi1-rx cxF spi1-tx cxFspi2spi2-cs1 cxspi2-clk cxF"spi2-cs0 cxF%spi2-rx cxF$spi2-tx c xF#uart0uart0-xfer cxwF,uart0-cts cxF-uart0-rts cwF.uart1uart1-xfer cx wF/uart1-cts c xuart1-rts c wuart2uart2-xfer cxwF0uart3uart3-xfer cxwF1uart3-cts c xuart3-rts c wuart4uart4-xfer cxwF2uart4-cts c xuart4-rts c wtsadcotp-gpio c wF7otp-out c wF8pwm0pwm0-pin cwFKpwm1pwm1-pin cwFLpwm2pwm2-pin cwFMpwm3pwm3-pin cwFNgmacrgmii-pins cwwwwzzzzwww zzwwF;rmii-pins cwwwwwwwwwwphy-int cxF=phy-rst c|F<spdifspdif-tx c wF^pcfg-output-high F|ledsuser-led c|F}pmicpmic-int cxFFpmic-sleep cxpcfg-pull-up-drv-12ma q F{buttonsuser-button-pins cxxFrv4162i2c-rtc-int c xF'touchscreents-irq-pin cwusb_hosthost0-vbus-drv c wFhost1-vbus-drv cwFusb_otgotg-vbus-drv c wFmemorymemoryexternal-gmac-clock fixed-clocksY@ ext_gmacF:user-leds gpio-ledsdefault}user Sgreen_led ~ Yheartbeat keepvdd-emmc-ioregulator-fixed evdd_emmc_iow@w@eFvdd-in-otg-outregulator-fixedevdd_in_otg_outtLK@LK@FHvdd-misc-1v8regulator-fixed evdd_misc_1v8tw@w@FIuser-buttons gpio-keysdefaultbutton@0Shome f button@1Smenu  usb-host0-regulatorregulator-fixed  default evcc_host0_5vLK@LK@teHusb-host1-regulatorregulator-fixed default evcc_host1_5vLK@LK@teHusb-otg-regulatorregulator-fixed  default evcc_otg_5vLK@LK@teH #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2rtc0rtc1interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksphandleoperating-pointsopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0sd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsvref-supplydmasdma-namesspi-max-frequencym25p,fast-readpagesizelabellinux,default-triggerreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-handlephy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayti,rx-internal-delayti,tx-internal-delayti,fifo-depthenet-phy-lane-no-swapti,clk-output-selphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyboost-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvddio-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorregulator-enable-ramp-delayregulator-ramp-delayvin-supply#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellssdcard-supplyflash0-supplyflash1-supplygpio1830-supplygpio30-supplybb-supplydvp-supplylcdc-supplywifi-supplyaudio-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-businterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highgpiosdefault-statelinux,code